Logic Minimization Algorithms for VLSI Synthesis
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Logic Minimization Algorithms for VLSI Synthesis
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Review
`In short, a quite remarkable realization in the field.' Zentrallblatt für Mathematik (1986)
kaizen (Japan) | 
17/08/2008
17/08/2008
This book is refered on the Switching Theory for Logic Synthesis by Tsutomu Sasao.
Also this book is refered on the Digital Systems Testing & Testable Design by Miron Abramovici.
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